Patent · US Active

System and method to store data in an adjustably partitionable memory array

US9558114B2 · kind B2 · utility

0Cited by

4References

7Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Rex Kho · Holzkirchen, DE
Michael J. Hassel · Milpitas, US
Wolfgang Beck · Schwabsoien, DE
Thomas Liebermann · Munich, DE

Key dates

Filing date	Jun 3, 2013
Grant date	Jan 31, 2017
Priority date	—
Expiry date	Apr 13, 2035

Classification

Technology area (CPC G)Physics
CPC primaryG11C2211/5641
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The disclosure relates to an electronic memory system, and more specifically, to a system for storing data in an adjustably partitionable memory array, and a method to store data in an adjustably partitionable memory array. According to an embodiment of the disclosure, a system to store data in an adjustably partitionable memory array is provided, the system including a plurality of memory cells arranged in an array of rows and columns, a plurality of bit lines, and a plurality of switches, wherein each bit line is electrically coupled to a column of memory cells and each bit line comprises a switch configured to allow the respective bit line to be partitioned by opening of the switch.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.