Patent · US Active

Method of designing circuit layout and system for implementing the same

US9558314B2 · kind B2 · utility

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20Claims
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Assignee

Inventors

Key dates

Filing dateDec 23, 2014
Grant dateJan 31, 2017
Priority date
Expiry dateJan 20, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/367
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method of designing a circuit layout includes calculating a typical value representing performance characteristics for the circuit layout based on a graphic database system (GDS) file. The method further includes calculating an adjustment value based on the GDS file and at least one of a CAP corner vector or a RES corner vector, wherein the CAP corner vector is based on an eigenvector of a parasitic capacitance of the circuit layout, and the RES corner vector is based on an eigenvector of a parasitic resistance of the circuit layout. The method further includes calculating a corner value based on the typical value and the adjustment value. The method further includes modifying the GDS file if performance characteristics of the corner value fail to satisfy performance requirements of the circuit layout.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.