Multi-level leadframe with interconnect areas for soldering conductive bumps, multi-level package assembly and method for manufacturing the same
US9559043B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 5, 2014 |
| Grant date | Jan 31, 2017 |
| Priority date | — |
| Expiry date | Dec 5, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/16245
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A leadframe, a package assembly and methods for manufacturing the same are disclosed. A plurality of electronic devices are stacked in a plurality of levels in the package assembly. The leadframe includes a plurality of leads having interconnect areas. The plurality of leads are grouped so that the interconnect areas of each group of leads have a height corresponding to one level of electronic devices. In the package assembly, the interconnect areas of each group of leads are soldered to one level of electronic devices. The leadframe and the package assembly result in increased packaging density, less usage of bonding wires in the package assembly, and improve reliability. The method for manufacturing the package assembly reduces adverse effects of a reflow process on properties of the electronic devices, and thus further improves reliability of the package assembly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.