Integrated circuit cooling using embedded peltier micro-vias in substrate
US9559283B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2015 |
| Grant date | Jan 31, 2017 |
| Priority date | — |
| Expiry date | Mar 30, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N10/01
Abstract
A semiconductor device package and method for manufacturing the same, includes a semiconductor substrate including a plurality of embedded thermoelectric couples. The embedded thermoelectric couples can be in trenches and extend partially into the substrate from the handle side of the substrate. An n-type pillar and a p-type pillar are electrically connected using a conducting contact plate to form each of the partially embedded thermoelectric couples. A series connection layer electrically connects the plurality of thermoelectric couples on the handle side. A power source provides electrical current to the series connection layer allowing current to flow through the plurality of the series connected thermoelectric couples. A heat sink is positioned adjacent to the connected thermoelectric couples for transferring heat away from the device side to the heat sink using the thermoelectric couples.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.