Semiconductor device
US9564220B2 · kind B2 · utility
5Cited by
7References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 14, 2015 |
| Grant date | Feb 7, 2017 |
| Priority date | — |
| Expiry date | Apr 14, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes memory blocks including a plurality of memory cells, wherein the plurality of memory cells are divided into a plurality of pages, and an operation circuit suitable for outputting operating voltages to local lines of the memory blocks to perform a program loop, an erase loop and a read operation on the plurality of memory cells, wherein the operation circuit is suitable for applying a dummy pulse having a positive potential to the local lines after the program loop or the erase loop is completed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.