Patent · US Active

Functional block stacked 3DIC and method of making same

US9564420B2 · kind B2 · utility

7Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 3, 2016
Grant dateFeb 7, 2017
Priority date
Expiry dateMar 3, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/19105
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An embodiment device package includes a fan-out redistribution layer (RDL), a device over and bonded to the fan-out RDL, and a molding compound over the fan-out RDL and extending along sidewalls of the device. The device includes a first functional tier having a first metallization layer and a second functional tier having a second metallization layer. The second functional tier is bonded to the first functional tier. The device further includes an interconnect structure electrically connecting the first metallization layer to the second metallization layer. The interconnect structure includes an inter-tier via (ITV) at least partially disposed in both the first functional tier and the second functional tier, and the ITV contacts the first metallization layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.