Semiconductor device including FinFETs having different gate structures and method of manufacturing the semiconductor device
US9564435B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2015 |
| Grant date | Feb 7, 2017 |
| Priority date | — |
| Expiry date | Jul 10, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0128
Abstract
A semiconductor device includes a substrate having a logic device region including logic devices thereon, and an input/output (I/O) device region including I/O devices thereon adjacent the logic device region. A first fin field-effect transistor (FinFET) on the logic device region includes a first semiconductor fin protruding from the substrate, and a triple-gate structure having a first gate dielectric layer and a first gate electrode thereon. A second FinFET on the I/O device region includes a second semiconductor fin protruding from the substrate, and a double-gate structure having a second gate dielectric layer and a second gate electrode thereon. The first and second gate dielectric layers have different thicknesses. Related devices and fabrication methods are also discussed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.