Patent · US Active

Conditional links for direct memory access controllers

US9569384B2 · kind B2 · utility

0Cited by

6References

21Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Frank Hellwig · Wunstorf, DE
Simon Cottam · Bristol, GB
Harald Zweck · Munich, DE

Key dates

Filing date	Mar 14, 2013
Grant date	Feb 14, 2017
Priority date	—
Expiry date	Oct 26, 2035

Classification

Technology area (CPC G)Physics
CPC primaryG06F13/28
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Some embodiments relate to a Direct Memory Access (DMA) controller. The DMA controller includes a bus controller having a system bus interface and configured to read a pattern from a memory location via the system bus interface. Pattern comparison logic compares the read pattern to at least one predetermined pattern. Control logic induces the bus controller to process a first conditional link over the system bus interface if the read pattern differs from the predetermined pattern, and induces the bus controller to process a second conditional link over the system bus interface if the read pattern differs from the predetermined pattern.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.