3-D stacked multiprocessor structure with vertically aligned identical layout operating processors in independent mode or in sharing mode running faster components
US9569402B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2012 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | Feb 24, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Three-dimensional (3-D) processor structures are provided which are constructed by connecting processors in a stacked configuration. For example, a processor system includes a first processor chip comprising a first processor, and a second processor chip comprising a second processor. The first and second processor chips are connected in a stacked configuration with the first and second processors connected through vertical connections between the first and second processor chips. The processor system further includes a mode control circuit to selectively configure the first and second processors of the first and second processor chips to operate in one of a plurality of operating modes, wherein the processors can be selectively configured to operate independently, to aggregate resources, to share resources, and/or be combined to form a single processor image.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.