Identifying noise couplings in integrated circuit
US9569577B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2014 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | Jul 17, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for determining the sensitivity of an analog output node of a mixed-signal module on a system on a chip (SoC) to noise coupling on the analog input nodes of the mixed-signal module includes (i) selecting an IP block for testing, (ii) selecting the output node, (iii) compiling a list of input nodes for testing, (iv) for each input node of the list, providing excitation signals at different frequencies, (v) for each provided excitation signal, determining the output node's noise sensitivity, and (vi) if any individual and/or cumulative noise sensitivity result exceeds a preset threshold, then modifying the SoC design to take corrective action.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.