Four corner high performance depth test
US9569882B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2013 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | Feb 27, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2210/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One or more apparatus and method for multi-pixel/sample level depth testing in a graphics processor is described. In embodiments, a bounding-box of variable size over which a depth test is to be performed is determined based on the pattern of lit pixels or samples within rasterizer tile. A multi-corner depth test may be performed between a source depth data plane and a destination depth plane within a source depth data bound where destination depth data is continuous within the source data bound. A range-based depth test may be performed in response to the destination data being discontinuous. Source depth data prevailing in the depth test may be stored in a compressed plane equation format in response to the source data being continuous within the source data bound, and may be stored as min/max depth data if discontinuous.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.