Vasanth Ranganathan
154Patents
8h-index
153Co-inventors
83Inventor score
Filing activity: Apr 25, 2002 → May 22, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10353706B2 | Instructions and logic to perform floating-point and integer operations for machine learning | Physics | 40 | Active |
| US10474458B2 | Instructions and logic to perform floating-point and integer operations for machine learning | Physics | 40 | Active |
| US11113784B2 | Sparse optimizations for a matrix accelerator architecture | Physics | 36 | Active |
| US11080046B2 | Instructions and logic to perform floating point and integer operations for machine learning | Physics | 33 | Active |
| US11360767B2 | Instructions and logic to perform floating point and integer operations for machine learning | Physics | 33 | Active |
| US11620256B2 | Systems and methods for improving cache efficiency and utilization | Physics | 32 | Active |
| US11169799B2 | Instructions and logic to perform floating-point and integer operations for machine learning | Physics | 31 | Active |
| US10304154B2 | Coordination and increased utilization of graphics processors during inference | Emerging Cross-Sectional Technologies | 29 | Active |
| US11755501B2 | Efficient data sharing for graphics data processing operations | Emerging Cross-Sectional Technologies | 6 | Active |
| US11663746B2 | Systolic arithmetic on sparse data | Physics | 5 | Active |
| US10424107B2 | Hierarchical depth buffer back annotaton | Physics | 5 | Active |
| US10430310B2 | Dynamic voltage-frequency curve management | Emerging Cross-Sectional Technologies | 4 | Active |
| US10102609B1 | Low granularity coarse depth test efficiency enhancement | Emerging Cross-Sectional Technologies | 4 | Active |
| US10303953B2 | Person tracking and privacy and acceleration of data using autonomous machines | Physics | 4 | Active |
| US11074109B2 | Dynamic load balancing of compute assets among different compute contexts | Physics | 4 | Active |
| US11145105B2 | Multi-tile graphics processor rendering | Physics | 4 | Active |
| US11360808B2 | Efficient thread group scheduling | Physics | 4 | Active |
| US10346166B2 | Intelligent thread dispatch and vectorization of atomic operations | Emerging Cross-Sectional Technologies | 4 | Active |
| US11676239B2 | Sparse optimizations for a matrix accelerator architecture | Physics | 4 | Active |
| US10878614B2 | Motion biased foveated renderer | Physics | 3 | Active |
| US10909039B2 | Data prefetching for graphics data processing | Emerging Cross-Sectional Technologies | 3 | Active |
| US11861761B2 | Graphics processing unit processing and caching improvements | Emerging Cross-Sectional Technologies | 3 | Active |
| US11157283B2 | Instruction prefetch based on thread dispatch commands | Physics | 2 | Active |
| US10430354B2 | Source synchronized signaling mechanism | Emerging Cross-Sectional Technologies | 2 | Active |
| US10929947B2 | Contextual configuration adjuster for graphics | Emerging Cross-Sectional Technologies | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.