Method to form semiconductor devices
US9570451B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 2016 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | May 10, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/371
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming semiconductor devices. First, a substrate is provided, and a first implant area and a second implant area are defined in a mask pattern. Subsequently, a resist layer on the substrate is patterned using the mask pattern to form a first opening exposing the first implant area and a second opening to expose the second implant area. After that, an ion implantation process including a partial shadowing ion implant is processed, wherein the second implant area is implanted by the partial shadowing ion implant to a predetermined concentration, and the first implant area is substantially not implanted by the partial shadowing ion implant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.