Method for forming PCM and RRAM 3-D memory cells
US9570516B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 11, 2015 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | Dec 11, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/883
Abstract
A method for fabricating 3-D cross-point memory arrays, and more particularly to fabricating phase change memory (PCM) and resistive RAM (ReRAM or RRAM) 3-D memory arrays having a cell size footprint of 4F2. The method for forming a plurality of layers of memory cells using a limited number of photolithographic patterning steps is applicable to memory devices having single or multiple storage bits per cell, such as cells having anywhere from one to eight bits per cell or more. These bits are stacked three dimensionally and include memory cells based on phase change material, on resistive change material, on magnetic field alignment, on mechanical switching, and on other memory cells based on other information storage technologies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.