Sensing multiple reference levels in non-volatile storage elements
US9576673B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2014 |
| Grant date | Feb 21, 2017 |
| Priority date | — |
| Expiry date | Dec 18, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are techniques for sensing multiple reference levels in non-volatile storage elements without changing the voltage on the selected word line. One aspect includes determining a first condition of a selected non-volatile storage element with respect to a first reference level based on whether a sensing transistor conducts in response to a sense voltage on a sense node. Then, a voltage on the source terminal of the sensing transistor is modified after determining the first condition with respect to the first reference level. A second condition of the selected non-volatile storage element is then determined with respect to a second reference level based on whether the sensing transistor conducts in response to the sense voltage on the sense node. This allows two different reference levels to be efficiently sensed. Dynamic power is saved due low capacitance of the sensing transistor relative to the sense node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.