Throttling command execution in non-volatile memory systems based on power usage
US9582211B2 · kind B2 · utility
6Cited by
2References
21Claims
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Key dates
| Filing date | Dec 16, 2014 |
| Grant date | Feb 28, 2017 |
| Priority date | — |
| Expiry date | Dec 16, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of operation in a non-volatile memory system for deferring, in accordance with a determination to reduce power consumption by the non-volatile memory system, execution of commands in a command queue corresponding to a distinct set of non-volatile memory devices during a respective wait period. In some implementations, the respective wait period for a first distinct set of non-volatile memory devices in at least two distinct sets is at least partially non-overlapping with the respective wait period for a second distinct set of non-volatile memory devices in the at least two distinct sets.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.