Semiconductor device with nanowires in different regions at different heights
US9583583B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 15, 2015 |
| Grant date | Feb 28, 2017 |
| Priority date | — |
| Expiry date | Dec 15, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/938
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has gate-all-around devices formed in respective regions on a substrate. The gate-all-around devices have nanowires at different levels. The threshold voltage of a gate-all-around device in first region is based on a thickness of an active layer in an adjacent second region. The active layer in the second region may be at substantially a same level as the nanowire in the first region. Thus, the nanowire in the first region may have a thickness based on the thickness of the active layer in the second region, or the thicknesses may be different. When more than one active layer is included, nanowires in different ones of the regions may be disposed at different heights and/or may have different thicknesses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.