FETs and methods of forming FETs
US9583598B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2014 |
| Grant date | Feb 28, 2017 |
| Priority date | — |
| Expiry date | Oct 3, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/215
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment is a structure. The structure comprises a fin on a substrate, isolation regions on the substrate, a dielectric region, and a gate structure. The fin includes a first epitaxial portion. The isolation regions are on opposing sides of the fin, and at least the first epitaxial portion of the fin protrudes from between the isolation regions. The dielectric region directly underlies the first epitaxial portion. A material of the dielectric region is different from a material of the isolation regions. The gate structure is along sidewalls and is over an upper surface of the fin. The gate structure defines a channel region in the first epitaxial portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.