Semiconductor structure including backgate regions and method for the formation thereof
US9583616B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 10, 2015 |
| Grant date | Feb 28, 2017 |
| Priority date | — |
| Expiry date | Mar 10, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a semiconductor substrate, a plurality of transistors and an electrically insulating layer provided between the substrate and the plurality of transistors, and a trench isolation structure including a portion between a first and a second island of the semiconductor structure and extending into the substrate to a first depth. The substrate includes a bottom region having a first type of doping and extending at least to a second depth greater than the first depth, and a deep well region having a second type of doping and extending to a third depth greater than the first depth and smaller than the second depth. Each of the first and second islands includes a first backgate region having the first type of doping and being continuous with the bottom region and a second backgate region having the second type of doping and being continuous with the deep well region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.