Semiconductor device and manufacturing method thereof
US9583641B1 · kind B1 · utility
10Cited by
3References
11Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 7, 2015 |
| Grant date | Feb 28, 2017 |
| Priority date | — |
| Expiry date | Dec 7, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
Abstract
A manufacturing method of a semiconductor device includes the following steps. A plurality of select gates are formed on a memory region of a semiconductor substrate. Two charge storage structures are formed between two adjacent select gates. A source region is formed in the semiconductor substrate, and the source region is formed between the two adjacent select gates. An insulation block is formed between the two charge storage structures and formed on the source region. A memory gate is formed on the insulation block, and the memory gate is connected to the two charge storage structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.