Imaging systems with pixel array verification circuitry
US9584800B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2014 |
| Grant date | Feb 28, 2017 |
| Priority date | — |
| Expiry date | Jun 2, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/76
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An imaging system may include an array of image pixels and verification circuitry. The verification circuitry may inject test voltages into the image pixel array during the photodiode reset operation. The test signals may then be read out using a correlated double sampling operation. Verification circuitry may compare the test signals to reference data to determine whether the imaging system is functioning properly (e.g., to determine whether the array of image pixels satisfies performance criteria). If the amount of mismatch between the test signals and the reference data exceed a predetermined threshold, the imaging system may be disabled and/or a warning signal may be presented to a user of the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.