Patent · US Active

System and method for testing an integrated circuit

US9588171B2 · kind B2 · utility

2Cited by
4References
36Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 16, 2012
Grant dateMar 7, 2017
Priority date
Expiry dateDec 6, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/2822
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

In accordance with an embodiment, a method of testing an integrated circuit, includes receiving a supply voltage on the integrated circuit via a first input pin, providing power to circuits disposed on the integrated circuit via the first input pin, comparing the supply voltage to an internally generated voltage, generating a digital output value based on the comparing, and applying the digital output value to a pin of the integrated circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.