Adapting erase cycle parameters to promote endurance of a memory
US9588702B2 · kind B2 · utility
3Cited by
1References
25Claims
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Key dates
| Filing date | Dec 30, 2014 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | Dec 30, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/108
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a data storage system including a non-volatile memory array, a controller repeatedly determines at least one health metric of the non-volatile memory array during an operating lifetime of the non-volatile memory array. In response to determining the at least one health metric, the controller selectively varies an erase parameter of the non-volatile memory array over the operating lifetime of the non-volatile memory array, such that endurance of the non-volatile memory array is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.