Thomas Parnell
63Patents
8h-index
30Co-inventors
70Inventor score
Filing activity: Dec 9, 2013 → Dec 18, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9251909B1 | Background threshold voltage shifting using base and delta threshold voltage shift values in flash memory | Physics | 39 | Active |
| US10101931B1 | Mitigating read errors following programming in a multi-level non-volatile memory | Physics | 26 | Active |
| US9496043B1 | Dynamically optimizing flash data retention or endurance based on data write frequency | Physics | 21 | Active |
| US10236067B2 | State-dependent read voltage threshold adaptation for nonvolatile memory | Physics | 14 | Active |
| US9569306B1 | Recovery of multi-page failures in non-volatile memory system | Physics | 14 | Active |
| US9558107B2 | Extending useful life of a non-volatile memory by health grading | Physics | 14 | Active |
| US9575681B1 | Data deduplication with reduced hash computations | Physics | 13 | Active |
| US9639462B2 | Device for selecting a level for at least one read voltage | Physics | 8 | Active |
| US9583205B2 | Background threshold voltage shifting using base and delta threshold voltage shift values in non-volatile memory | Physics | 7 | Active |
| US9996420B2 | Error-correction encoding and decoding | Electricity | 5 | Active |
| US10115472B1 | Reducing read disturb effect on partially programmed blocks of non-volatile memory | Physics | 5 | Active |
| US9864523B2 | Background threshold voltage shifting using base and delta threshold voltage shift values in non-volatile memory | Physics | 4 | Active |
| US9710199B2 | Non-volatile memory data storage with low read amplification | Physics | 4 | Active |
| US9870285B2 | Selectively de-straddling data pages in non-volatile memory | Physics | 4 | Active |
| US9513813B1 | Determining prefix codes for pseudo-dynamic data compression utilizing clusters formed based on compression ratio | Electricity | 4 | Active |
| US10222997B2 | Background threshold voltage shifting using base and delta threshold voltage shift values in non-volatile memory | Physics | 3 | Active |
| US9588702B2 | Adapting erase cycle parameters to promote endurance of a memory | Physics | 3 | Active |
| US9990279B2 | Page-level health equalization | Physics | 3 | Active |
| US11295236B2 | Machine learning in heterogeneous processing systems | Physics | 2 | Active |
| US9647694B2 | Diagonal anti-diagonal memory structure | Electricity | 2 | Active |
| US9712190B2 | Data packing for compression-enabled storage systems | Electricity | 2 | Active |
| US10361712B2 | Non-binary context mixing compressor/decompressor | Physics | 2 | Active |
| US10417088B2 | Data protection techniques for a non-volatile memory array | Physics | 1 | Active |
| US10162700B2 | Workload-adaptive data packing algorithm | Electricity | 1 | Active |
| US11562270B2 | Straggler mitigation for iterative machine learning via task preemption | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.