Semiconductor package and method of fabricating the same
US9589842B2 · kind B2 · utility
3Cited by
9References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2016 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | Jan 11, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor package is disclosed. The method includes disposing semiconductor chips on a support substrate, forming a protection layer covering top surfaces of the semiconductor chips, forming a molding layer covering the support substrate and the protection layer, and etching the molding layer to expose the protection layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.