Automatically adjusting baking process for low-k dielectric material
US9589856B2 · kind B2 · utility
1Cited by
5References
20Claims
0Family size
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Key dates
| Filing date | Nov 23, 2015 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | Nov 23, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/20
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes etching a low-k dielectric layer on a wafer to form an opening in the low-k dielectric layer. An amount of a detrimental substance in the wafer is measured to obtain a measurement result. Process conditions for baking the wafer are determined in response to the measurement result. The wafer is baked using the determined process conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.