TFT substrate having three parallel capacitors
US9589995B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2014 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | Apr 25, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1216
Abstract
Disclosed are a method for manufacturing a TFT substrate having storage capacitors and the TFT substrate. The method includes: (1) forming a gate terminal and a first metal electrode; (2) forming a gate insulation layer and a gate insulation layer through-hole; (3) forming an oxide semiconductor layer; (4) subjecting a portion of the oxide semiconductor layer to N-type heavy doping to form a first conductor electrode thereby constituting a first storage capacitor; (5) forming an etch stop layer and a first etch stop layer through-hole; (6) forming source/drain terminals and a second metal electrode, thereby constituting a second storage capacitor connected in parallel to the first capacitor; (7) forming a protection layer, a protection layer through-hole, and a second etch stop layer through-hole; and (8) forming a pixel electrode and a second conductor electrode, thereby constituting a third storage capacitor connected in parallel to the second capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.