Patent · US Active

Semiconductor device with power transistor cells and lateral transistors and method of manufacturing

US9590094B2 · kind B2 · utility

0Cited by

0References

10Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Robert Zink · Hagen, DE
Stefan Decker · Munich, DE
Sven Lanzerstorfer · Feldkirchen in Kärnten, AT

Key dates

Filing date	Jun 12, 2015
Grant date	Mar 7, 2017
Priority date	—
Expiry date	Jun 12, 2035

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/856
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

By thermal oxidation a field oxide layer is formed that lines first and second trenches that extend from a main surface into a semiconductor layer. After the thermal oxidation, field electrodes and trench gate electrodes of power transistor cells are formed in the first and second trenches. A protection cover including a silicon nitride layer is formed that covers a cell area with the first and second trenches. With the protection cover covering the cell area, planar gate electrodes of lateral transistors are formed in a support area of the semiconductor layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.