Semiconductor device for optoelectronic integrated circuits
US9590136B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Jun 11, 2015 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | Jun 11, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/357
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A semiconductor device includes a series of layers formed on a substrate, including a first plurality of n-type layers, a second plurality of layers that form a p-type modulation doped quantum well structure (MDQWS), a third plurality of layers disposed between the p-type MDQWS and a fourth plurality of layers that form an n-type MDQWS, and a fifth plurality of p-type layers. The first plurality of layers includes a first etch stop layer of n-type formed on an n-type contact layer. The third plurality of layers includes a second etch stop layer formed above the p-type MDQWS and a third etch stop layer formed above and offset from the second etch stop layer. The fifth plurality of layers includes a fourth etch stop layer of p-type formed above the n-type MDQWS and a fifth etch stop layer of p-type doping formed above and offset from the fourth etch stop layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.