Bias adjustment circuitry for balanced amplifiers
US9595927B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 18, 2014 |
| Grant date | Mar 14, 2017 |
| Priority date | — |
| Expiry date | Aug 18, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/555
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Circuitry includes a balanced amplifier and bias adjustment circuitry. The bias adjustment circuitry is coupled to the balanced amplifier and is configured to measure an RF termination voltage across an output termination impedance of the balanced amplifier and adjust a bias voltage supplied to the balanced amplifier based on the RF termination voltage. Notably, the RF termination voltage is proportional to a voltage standing wave ratio (VSWR) of the balanced amplifier, and thus enables an accurate measurement thereof. By using the RF termination voltage to adjust a bias voltage supplied to the balanced amplifier, overvoltage and/or thermally stressing conditions of the balanced amplifier as a result of high VSWR may be avoided while simultaneously avoiding the need for large or expensive isolation circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.