Method, apparatus and system for targeted healing of stability failures through bias temperature instability
US9601188B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2016 |
| Grant date | Mar 21, 2017 |
| Priority date | — |
| Expiry date | Feb 18, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/56
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
We disclose methods, apparatus, and systems for improving semiconductor device yield and/or reliability through bias temperature instability (BTI). One device may comprise a plurality of cells of an array, wherein each of the cells comprises a pass gate and a latch; a plurality of word lines, wherein each word line controls access to each pass gate of a first number of cells; a word line driver electrically connected to each word line; a row decoder configured to authorize or deauthorize a write voltage to each word line through the word line driver, wherein the write voltage is selected from an operational write voltage or a first write voltage; and a control line configured to provide an operational write voltage or a first write voltage to each word line authorized by the row decoder, wherein the first write voltage is greater than an operational write voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.