Method for the formation of a finFET device with epitaxially grown source-drain regions having a reduced leakage path
US9601381B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 5, 2013 |
| Grant date | Mar 21, 2017 |
| Priority date | — |
| Expiry date | Dec 7, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Elongated fins of a first semiconductor material are insulated from and formed over an underlying substrate layer. Elongated gates of a second semiconductor material are then formed to cross over the elongated fins at channel regions, and the gate side walls are covered by sidewall spacers. A protective material is provided to cover the underlying substrate layer and define sidewall spacers on side walls of the elongated fins between the elongated gates. The first semiconductor material and insulating material of the elongated fins located between the protective material sidewall spacers (but not under the elongated gates) is removed to form trenches aligned with the channel regions. Additional semiconductor material is then epitaxially grown inside each trench between the elongated gates to form source-drain regions adjacent the channel regions formed by the elongated fins of the first semiconductor material located under the elongated gates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.