Circuit substrate and semiconductor package structure
US9601425B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2015 |
| Grant date | Mar 21, 2017 |
| Priority date | — |
| Expiry date | Aug 18, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/81447
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention provides a circuit substrate and a semiconductor package structure. The circuit substrate includes a core substrate having a chip-side surface and a bump-side surface opposite to the chip-side surface. A first through via plug passes through the core substrate. A first conductive line pattern and a second conductive line pattern adjacent to the first conductive line are disposed on the chip-side surface. A pad is disposed on the bump-side surface. The first through via plug is in direct contact with and partially overlapping the first conductive line pattern and the pad. The first conductive line pattern, the second conductive line pattern and the first through via plug are configured to transmit voltage supplies of the same type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.