Patent · US Active

Plasma etching and stealth dicing laser process

US9601437B2 · kind B2 · utility

6Cited by
1References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 9, 2014
Grant dateMar 21, 2017
Priority date
Expiry dateSep 9, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Consistent with an example embodiment, a method for preparing integrated circuit (IC) device die from a wafer substrate having a front-side with active devices and a back-side, comprises mounting the front-side of the wafer onto protective foil. A laser is applied to saw lane areas on the backside of the wafer, at a first focus depth to define a modification zone; the modification zone defined at a pre-determined depth within active device boundaries and the active device boundaries defined by the saw lane areas. The protective foil is stretched to separate IC device die from one another and expose active device side-walls. With dry-etching of the active device side-walls, the modification zone is substantially removed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.