Energy efficient high-speed link and method to maximize energy savings on the energy efficient high-speed link
US9606604B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 25, 2015 |
| Grant date | Mar 28, 2017 |
| Priority date | — |
| Expiry date | Nov 25, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/3209
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In high-speed link structures a receiver outputs a signal detect indicator (SDI) with a first logic value when transmissions are detected and a second logic value when suspension of transmissions is detected. A controller detects transitions in the SDI and causes corresponding transitions in an energy detect indicator (EDI). A physical control sublayer (PCS) has different operating states that cause the receiver to operate in different power modes and transitions between the operating states based on the EDI. If the EDI has the second logic value, the PCS remains in a non-active state and the receiver operates in a low power idle (LPI) mode. When the EDI transitions to the first logic value, the PCS exits the non-active state and the receiver operates in a non-LPI mode. To ensure that the PCS properly enters and doesn't pre-maturely exit the non-active state, EDI transitions to the first logic value are delayed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.