Patent · US Active

Methods and systems for die failure testing

US9606882B2 · kind B2 · utility

1Cited by
7References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 13, 2015
Grant dateMar 28, 2017
Priority date
Expiry dateJun 5, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2201/85
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The disclosed method includes, at a storage controller of a storage system, receiving host instructions to modify configuration settings corresponding to a first memory portion of a plurality of memory portions. The method includes, in response to receiving the host instructions to modify the configuration settings, identifying the first memory portion from the host instructions and modifying the configuration settings corresponding to the first memory portion, in accordance with the host instructions. The method includes, after modifying the configuration settings corresponding to the first memory portion, sending one or more commands to perform memory operations having one or more physical addresses corresponding to the first memory portion and receiving a failure notification indicating failed performance of at least a first memory operation of the one or more memory operations. The method includes, in response to receiving the failure notification, executing one or more error recovery mechanisms.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.