Semiconductor chip package with undermount passive devices
US9607935B2 · kind B2 · utility
2Cited by
3References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 21, 2009 |
| Grant date | Mar 28, 2017 |
| Priority date | — |
| Expiry date | Feb 27, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/4913
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Various semiconductor chip packages with undermounted passive devices and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a semiconductor chip to a first side of a carrier substrate where the carrier substrate includes a second side opposite the first side. At least one passive device is coupled to the second side of the carrier substrate. The at least one passive device includes at least one first terminal electrically coupled to the semiconductor chip and at least one second terminal adapted to couple to a printed circuit board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.