Memory device and method of fabricating the same
US9608040B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2016 |
| Grant date | Mar 28, 2017 |
| Priority date | — |
| Expiry date | May 19, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device including a substrate, an insulating layer on the substrate, the insulating layer including a first region having a first top surface and a second region having a second top surface, the second top surface being lower than the first top surface with respect to the substrate, the first region including a first through hole penetrating therethrough, the second region including a second through hole penetrating therethrough, a first conductive pattern filling the first through hole, a second conductive pattern at least partially filling the second through hole, a magnetic tunnel junction pattern on the first conductive pattern, and a contact plug coupled to the second conductive pattern may be provided. Further, a method of fabricating the memory device also may be provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.