Polarization free gallium nitride-based photonic devices on nanopatterned silicon
US9608160B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2016 |
| Grant date | Mar 28, 2017 |
| Priority date | — |
| Expiry date | Feb 5, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/032
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
After forming patterned dielectric material structures over a (100) silicon substrate, portions of the silicon substrate that are not covered by the patterned dielectric material structures are removed to provide a plurality of openings within the silicon substrate. Each opening exposes a surface of the silicon substrate having a (111) crystalline plane. A buffer layer is then formed on the exposed surfaces of the patterned dielectric material structures and the silicon substrate. A dual phase Group III nitride structure including a cubic phase region is formed filling a space between each neighboring pair of the patterned dielectric material structures and one of the openings located beneath the space. Finally, at least one Group III nitride layer is epitaxially deposited over the cubic phase region of the dual phase Group III nitride structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.