Semiconductor memory device
US9613713B2 · kind B2 · utility
6Cited by
5References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2016 |
| Grant date | Apr 4, 2017 |
| Priority date | — |
| Expiry date | Jun 28, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor memory device includes: first and second memory cells; first and second word lines coupled to the first and second memory cells, respectively. When data is read from the first memory cell, first and second voltages are applied to the first word line. A voltage of the second word line varies continuously by a first potential difference with time while the first voltage is applied to the first word line, and the voltage of the first word line varies continuously by a second potential difference with time while the second voltage is applied to the first word line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.