Patent · US Active

Method and apparatus for chip-to-wafer integration

US9613928B2 · kind B2 · utility

0Cited by
3References
18Claims
0Family size

Assignee

Inventor

Key dates

Filing dateJul 16, 2014
Grant dateApr 4, 2017
Priority date
Expiry dateJul 16, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2225/06593
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An apparatus and a method for chip-to-wafer integration is provided. The apparatus includes a coating module, a bonding module and a cleaning module. The method includes the steps of placing at least one chip on a wafer to form an integrated product, forming a film on the integrated product, such that the integrated product is substantially fluid-tight, and exerting a predetermined positive pressure on the film during permanent bonding of the at least one chip to the wafer. The method further includes the step of removing the film from the integrated product after permanent bonding of the at least one chip to the wafer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.