Electronic device and method for fabricating the same
US9614008B2 · kind B2 · utility
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16Claims
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Key dates
| Filing date | Dec 28, 2015 |
| Grant date | Apr 4, 2017 |
| Priority date | — |
| Expiry date | Dec 28, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic device includes a semiconductor memory that includes: an inter-layer dielectric layer which is formed over a substrate; a contact plug which is coupled with the substrate by passing through the inter-layer dielectric layer and has a protruding portion over the inter-layer dielectric layer; a first variable resistance pattern which is formed over the contact plug; and a protective layer which covers the first variable resistance pattern and a portion of sidewalls of the contact plug in such a manner that the sidewalls of the contact plug are exposed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.