Dragonfly processor interconnect network
US9614786B2 · kind B2 · utility
3Cited by
16References
29Claims
0Family size
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Key dates
| Filing date | Dec 27, 2014 |
| Grant date | Apr 4, 2017 |
| Priority date | — |
| Expiry date | Dec 27, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/1515
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A multiprocessor computer system comprises a dragonfly processor interconnect network that comprises a plurality of processor nodes, a plurality of routers, each router directly coupled to a plurality of terminal nodes, the routers coupled to one another and arranged into a group, and a plurality of groups of routers, such that each group is connected to each other group via at least one direct connection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.