Dennis C. Abts
49Patents
10h-index
29Co-inventors
75Inventor score
Filing activity: Oct 15, 1999 → Dec 22, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6856950B1 | Abstract verification environment | Physics | 56 | Expired |
| US8705368B1 | Probabilistic distance-based arbitration | Electricity | 55 | Active |
| US8306042B1 | Class-based deterministic packet routing | Physics | 52 | Active |
| US7830905B2 | Speculative forwarding in a high-radix router | Electricity | 24 | Active |
| US8407167B1 | Method for optimizing memory controller configuration in multi-core processors using fitness metrics and channel loads | Physics | 23 | Active |
| US8065573B2 | Method and apparatus for tracking, reporting and correcting single-bit memory errors | Electricity | 14 | Active |
| US8761166B2 | Flexible routing tables for a high-radix router | Electricity | 12 | Active |
| US8601297B1 | Systems and methods for energy proportional multiprocessor networks | Emerging Cross-Sectional Technologies | 11 | Active |
| US8774203B2 | One-way message notification with out-of-order packet delivery | Electricity | 11 | Active |
| US8285789B2 | Flattened butterfly processor interconnect network | Physics | 10 | Active |
| US9705798B1 | Systems and methods for routing data through data centers using an indirect generalized hypercube network | Electricity | 9 | Active |
| US8245087B2 | Multi-bit memory error management | Physics | 9 | Active |
| US11243880B1 | Processor architecture | Physics | 8 | Active |
| US7852836B2 | Reduced arbitration routing system and method | Electricity | 5 | Active |
| US11868250B1 | Memory design for a processor | Physics | 5 | Active |
| US9929960B1 | Systems and methods for routing data through data centers using an indirect generalized hypercube network | Electricity | 5 | Active |
| US7843929B2 | Flexible routing tables for a high-radix router | Electricity | 4 | Active |
| US8261134B2 | Error management watchdog timers in a multiprocessor computer | Electricity | 4 | Active |
| US8184626B2 | High-radix interprocessor communications system and method | Electricity | 4 | Active |
| US11360934B1 | Tensor streaming processor architecture | Physics | 3 | Active |
| US9614786B2 | Dragonfly processor interconnect network | Electricity | 3 | Active |
| US9069672B2 | Extended fast memory access in a multiprocessor computer system | Electricity | 3 | Active |
| US8095759B2 | Error management firewall in a multiprocessor computer | Electricity | 2 | Active |
| US11263129B1 | Processor architecture | Physics | 2 | Active |
| US8380935B2 | Atomic memory operation cache protocol with opportunistic combining | Physics | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.