Memory write protection for memory corruption detection architectures
US9619313B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2015 |
| Grant date | Apr 11, 2017 |
| Priority date | — |
| Expiry date | Oct 14, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1052
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory corruption detection technologies are described. A processing system can include a processor core including a register to store an address of a memory corruption detection (MCD) table. The processor core can receive, from an application, a memory store request to store data in a first portion of a contiguous memory block of the memory object of a memory. The memory store request comprises a first pointer indicating a first location of the first portion in the memory block to store the data. The processor core can retrieve, from the MCD table, a write protection indicator that indicates a first protection mode of the first portion. The processor core can send, to the application, a fault message when a fault event associated with the first portion occurs based on the first protection mode of the first portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.