System, method, and computer program product for electronic design configuration space determination and verification
US9619597B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2014 |
| Grant date | Apr 11, 2017 |
| Priority date | — |
| Expiry date | Jul 22, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a computer-implemented method for electronic design verification. Embodiments may include providing an electronic design including, at least in part, one or more hardware description languages and one or more software programming languages. Embodiments may further include calculating configuration information without analyzing the electronic design, wherein the configuration information includes one or more memory elements configured to control a mode of operation of the electronic design. Embodiments may also include determining a change in the one or more memory elements and altering a function associated with the electronic design verification based upon, at least in part, the determined change.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.