Semiconductor device and method of manufacturing the semiconductor device
US9620632B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2014 |
| Grant date | Apr 11, 2017 |
| Priority date | — |
| Expiry date | Oct 30, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/256
Abstract
A semiconductor device includes: a semiconductor substrate, an upper electrode, a lower electrode and a gate electrode. In the semiconductor substrate, a body region, a pillar region, and a barrier region are formed. The pillar region has an n-type impurity, is formed on a lateral side of the body region, and extends along a depth from a top surface of the semiconductor substrate to a lower end of the body region. The barrier region has an n-type impurity and is formed on a lower side of the body region and the pillar region. The barrier region is formed on the lower side of the pillar region. An n-type impurity concentration distribution in a depth direction in the pillar region and the barrier region has a maximum value in the pillar region. The n-type impurity concentration distribution has a folding point on a side deeper than the maximum value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.