Memory device error history bit
US9626242B2 · kind B2 · utility
3Cited by
1References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2015 |
| Grant date | Apr 18, 2017 |
| Priority date | — |
| Expiry date | Jun 26, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Classifying memory errors may include accessing data from a location within a memory array of a memory device. The memory array may include at least one bit field to store memory error classification information. One or more memory errors in the data may be determined. One or more memory errors may further be classified. In response to the classifying, memory error classification information may be stored as one or more bit values within the bit field.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.