Debug method and device for handling exceptions and interrupts
US9626280B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2013 |
| Grant date | Apr 18, 2017 |
| Priority date | — |
| Expiry date | May 24, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and information processing system provide trace compression for trace messages. In response to a branch of a conditional branch instruction having not been taken or having been taken, a flag of a history buffer is set or cleared. A trace address message is generated in response to a conditional indirect branch instruction being taken, wherein the trace address message includes address information indicating the destination address of the taken branch, and an index value indicating a corresponding flag of the history buffer. In response to a return from interrupt or return from exception instruction, a predicted return address is compared to an actual return address. A trace address message is generated in response to the predicted and actual return addresses not matching. A trace address message is not generated in response to the predicted and actual return addresses matching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.