Method and system for reducing a polygon bounding box
US9633458B2 · kind B2 · utility
5Cited by
62References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 23, 2012 |
| Grant date | Apr 25, 2017 |
| Priority date | — |
| Expiry date | Dec 29, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T11/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a graphics processing pipeline, a processing unit establishes a bounding box around a polygon in order to identify sample points that are covered by the polygon. For a given sample point included within the bounding box, the processing unit constructs a set of lines that intersect at the sample point, where each line in the set of lines is parallel to at least one side of the polygon. When all vertices of the polygon reside on one side of at least one line in the set of lines, the processing unit may reduce the size of the bounding box to exclude the sample point.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.